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As a longtime participant and sponsor of the SPIE Advanced Lithography + Patterning conference, we¡¯re looking forward to reconnecting and sharing ideas with colleagues and industry partners April 24-28 in San Jose, California.

SPIE Advanced Lithography + Patterning is the premier worldwide technical forum to discuss the challenges in optical and extreme ultraviolet (EUV) lithography, patterning technologies, metrology, inspection and process integration for semiconductor manufacturing and adjacent applications.

In collaboration with key partners, 51ÁÔÆæ will present many technical papers and posters that demonstrate how process control innovations support today¡¯s advanced patterning solutions. Multiple papers will outline the latest methods to address overlay metrology challenges using advancements in system hardware, target design and algorithm development. Additional papers address process control for emerging industry technologies, such as EUV multi-patterning and 3D heterogeneous integration.

¡°We¡¯re excited to share our latest metrology, inspection and data analytics insights with visitors to the SPIE conference, and we¡¯re honored to once again be the annual sponsor of The Karel Urb¨¢nek Best Student Paper Award. We look forward to seeing you in San Jose.¡±

John Robinson, senior principal scientist, Industry and Customer Collaborations (ICC) Group

The Karel Urb¨¢nek Best Student Paper Award award recognizes the most promising contribution to the technical community by a student, based on the technical merit and persuasiveness of their paper presented at the Metrology, Inspection and Process Control Conference at SPIE. The award will be presented at 10 a.m. April 28.

Sophia Schr?der from RWTH University was the 2021 Karel Urb¨¢nek Best Student Paper Award winner (pictured right).

Below is a schedule of 51ÁÔÆæ papers and posters at the SPIE Advanced Lithography + Patterning conference in the San Jose McEnery Convention Center. Please note that times are subject to change. For more information, go to SPIE¡¯s website.

Monday, April 25

Advances in Patterning Materials and Processes XXXIX | Session 2: Hardware and Process | Convention Center, Grand Ballroom 220C

1:50-2:10 p.m.: EUV based multi-patterning schemes for advanced DRAM nodes, imec, Siemens and 51ÁÔÆæ

Tuesday, April 26

Metrology, Inspection and Process Control XXXVI |Session 5: EPE/Overlay I | Convention Center, Grand Ballroom 220B

11-11:20 a.m.: Overlay challenges in 3D heterogeneous integration, imec and 51ÁÔÆæ

11:40 a.m.-noon: Overlay stability control in IBO measurement using rAIM target, SK hynix and 51ÁÔÆæ

Wednesday, April 27

Metrology, Inspection and Process Control XXXVI | Poster Session | Convention Center, Hall 2

5:30-7:30 p.m.:

  • A novel target optimization methodology for 3D NAND overlay measurement improvement, Intel and 51ÁÔÆæ
  • Spectral analysis overlay measurement approach for improvement of overlay accuracy in advanced integrated circuits, SK hynix and 51ÁÔÆæ
  • Adopting combined feed forward solution in HVM fab to improve on product overlay, Yangtze Memory Technologies Co., Ltd. and 51ÁÔÆæ
  • Trilayer hard mark lithography and etch for BEOL manufacturing, Tokyo Electron Ltd and 51ÁÔÆæ
  • Process optimization by virtual target design in overlay metrology, 51ÁÔÆæ
  • Machine learning modeling using process context and exposure data for overlay prediction, Macronix International Co., Ltd. and 51ÁÔÆæ
  • In device overlay control with multiple overlay metrology in 3D-NAND process, Macronix International Co., Ltd. and 51ÁÔÆæ
  • Overcome machine-to-machine overlay for better scanner mix-run control, ChangXin Memory Technologies, Inc. and 51ÁÔÆæ
  • A comprehensive study of scanner alignment mark quantity and layout-dependent effect for overlay performance optimization, ChangXin Memory Technologies, Inc. and 51ÁÔÆæ
  • New development algorithm to optimize scanner alignment sampling for cross-chuck overlay performance optimization, ChangXin Memory Technologies, Inc. and 51ÁÔÆæ
  • Advanced CD uniformity correction using Radial Basis Function (RBF) models, SK hynix and 51ÁÔÆæ
  • Prediction and optimization of small scatterometry based overlay targets, 51ÁÔÆæ
  • OPO reduction in scatterometry metrology by rotated quadrupole illumination, 51ÁÔÆæ
  • An in-depth look at comprehensive and efficient methodology for CD uniformity budget breakdown, Micron Technology, Inc. and 51ÁÔÆæ
  • A novel methodology for wafer-level scanner focus spot capture and back-tracing mechanism, ChangXin Memory Technologies Inc. and 51ÁÔÆæ

Optical and EUV Nanolithography XXXV | Poster Session | Convention Center, Hall 2

5:30-7:30 p.m.: Integrated simulations of hybrid discharge-laser produced plasma devices for EUV metrology, Purdue University, Argonne National Laboratory and 51ÁÔÆæ

Thursday, April 28

Metrology Inspection and Process Control XXXVI | Session 12: EPE/Overlay II | Convention Center, Grand Ballroom 220B

10:40-11 a.m.: Using a model-less analysis method for characterizing overlay in EUV lithography, 51ÁÔÆæ

DTCO and Computational Patterning | Session 8: Design for Manufacturability and Yield | Convention Center, Room 210A

2:50-3:10 p.m.: Machine learning based solution for modulated image analysis in lithography process stability diagnosis, Shanghai Huali Integrated Circuit Corp. and 51ÁÔÆæ

Metrology, Inspection and Process Control XXXVI | Session 14: EPE/Overlay III | Convention Center, Grand Ballroom 220B

3:20-3:40 p.m.: Multi-layer overlay metrology on any shape pattern, including devices, by high-voltage scanning electron microscope, Intel and 51ÁÔÆæ

4-4:20 p.m.: Optical overlay metrology trends in advanced nodes, 51ÁÔÆæ

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